That has been tried multiple times by multiple companies in the past. Most recently (for CPUs, to my knowledge) by ARM in the armv6-era VFP ISA, which was deprecated and replaced by the "normal SIMD" (fixed width) NEON instructions in armv7.
It's a good enough idea that people keep trying to make it work. But it's never been really successful, either.
The major advantage of the "almost fixed"(1) width is the possibility to tightly control (that is, do it directly in the registers) operations "in both dimensions", which actually matters in real life algorithms.
1) It's not fixed as the processors actually get wider vectors instruction sets: SSE is 128 bits, but AVX is 256 bits.
Still, having the fixed width allows you to optimize the existing code better than when you introduce the abstraction without the fixed width. See the shuffle operations and similar, which operate on the parts of the wide registers and which are actually needed for the real life optimizations to avoid expensive memory accesses and allow operating on the registers alone.
It's a good enough idea that people keep trying to make it work. But it's never been really successful, either.